Etude et Implantation d'Algorithmes de Compression d'Images dans un Environnement Mixte Matériel et Logiciel

The main purpose of this thesis was to contribute to the development and to the design of anembedded system for multimedia by using the HW/SW methodology (codesign). A library offlexible IP cores (Intellectual Property) for video applications was created. Within thisframework, a hardware platform for video acquisition and video restitution was achieved inorder to evaluate the codesign methodology approach and to study the video processingalgorithm. We have studied and implemented the H.263 video encoder from the UIT-Torganism. The frequency of our platform is about 120 MHz. The whole development wasexecuted under μClinux Operating System and controlled by the NIOS II processor. TheH.263 encoder was developed with different hardware accelerators for the SAD, TCD/TCDIand Q/QI operations and permits finally to code video sequences at [email protected] sujet de cette thèse est la contribution au développement et à la conception d’un systèmemultimédia embarqué en utilisant la méthodologie de conception conjointelogicielle/matérielle (codesign). Il en a découlé la constitution d’une bibliothèque des modulesIP (Intellectual Property) pour les applications vidéo. Dans ce contexte, une plateformematérielle d’acquisition et de restitution vidéo a été réalisée servant de préalable àl’évaluation de la méthodologie de conception en codesign et à toute étude d’algorithme detraitement vidéo. On s’est intéressé en particulier à l’étude et à l’implantation de la norme decompression vidéo H.263 de l’organisme UIT-T. La fréquence de fonctionnement de laplateforme est de 120 MHz. L’ensemble du développement est exécuté par le processeurNIOS II sous le système d’exploitation μClinux. Le codeur H.263 ainsi développé, grâce auxdifférents accélérateurs matériels pour le SAD, TCD/TCDI et Q/QI permet de coder desséquences vidéo QCIF@15Hz

Etude et implantation d'algorithmes de compression d'images dans un environnement mixte matériel et logiciel

Le sujet de cette thèse est la contribution au développement et à la conception d’un système multimédia embarqué en utilisant la méthodologie de conception conjointe logicielle/matérielle (codesign). Il en a découlé la constitution d’une bibliothèque des modules IP (Intellectual Property) pour les applications vidéo. Dans ce contexte, une plateforme matérielle d’acquisition et de restitution vidéo a été réalisée servant de préalable à l’évaluation de la méthodologie de conception en codesign et à toute étude d’algorithme de traitement vidéo. On s’est intéressé en particulier à l’étude et à l’implantation de la norme de compression vidéo H.263 de l’organisme UIT-T. La fréquence de fonctionnement de la plateforme est de 120 MHz. L’ensemble du développement est exécuté par le processeur NIOS II sous le système d’exploitation μClinux. Le codeur H.263 ainsi développé, grâce aux différents accélérateurs matériels pour le SAD, TCD/TCDI et Q/QI permet de coder des séquences vidéo [email protected] main purpose of this thesis was to contribute to the development and to the design of an embedded system for multimedia by using the HW/SW methodology (codesign). A library of flexible IP cores (Intellectual Property) for video applications was created. Within this framework, a hardware platform for video acquisition and video restitution was achieved in order to evaluate the codesign methodology approach and to study the video processing algorithm. We have studied and implemented the H.263 video encoder from the UIT-T organism. The frequency of our platform is about 120 MHz. The whole development was executed under μClinux Operating System and controlled by the NIOS II processor. The H.263 encoder was developed with different hardware accelerators for the SAD, TCD/TCDI and Q/QI operations and permits finally to code video sequences at QCIF@15Hz

Design technique to mitigate unwanted coupling in densely packed radiating elements of an antenna array for electronic devices and wireless communication systems operating in the millimeter-wave band

An innovative design is presented of a metamaterial inspired antenna array for millimeter-wave band applications where non-mechanical beam-steering is required such as in 5G and 6G communications, automotive and radar systems. In communication systems beam-steering antennas can significantly improve signal-to-noise ratio, spatial directivity, and the efficiency of data transmission. However, in tightly packed arrays the effects of mutual coupling between the radiating elements can severely limit the array’s performance. The proposed antenna array consists of a 3×3 matrix of patch radiators that are tightly packed and interconnected to each other. Rows of radiators are demarcated by a horizontal microstrip transmission-line whose ends are short-circuited to the ground-plane. This technique reduces unwanted surface waves that contribute to undesired coupling. Embedded in the square patch radiators is a rhombus shaped slot that increases the effective aperture of the antenna with no impact on the antenna’s size. As the antenna is excited via a single feedline the edge-to-edge spacing between the radiators and the interconnected feedlines are made such that there is phase coherency at the radiating elements. Measured results show that the effectiveness of the proposed array in simultaneously improving its impedance bandwidth and radiation characteristics. The measured peak gain and radiation efficiency are 13.6 dBi and 89.54%, respectively

Metasurface-Inspired Flexible Wearable MIMO Antenna Array for Wireless Body Area Network Applications and Biomedical Telemetry Devices

This article presents a sub-6GHz ISM-band flexible wearable MIMO antenna array for wireless body area networks (WBANs) and biomedical telemetry devices. The array is based on metasurface inspired technology. The antenna array consists of 2×2 matrix of triangular-shaped radiation elements that were realized on 0.8 mm thick Rogers RT/duroid 5880 substrate. Radiation characteristics of the array are enhanced by isolating the surface current interaction between the individual radiators in the array. This is achieved by inserting an electromagnetic bandgap (EBG) decoupling structure between the radiating elements. The radiating elements were transformed into a metasurface by etching sub-wavelength slots inside them. The periodic arrangement of slots acts like resonant scatterers that manipulate the electromagnetic response of the surface. Results confirm that by employing the decoupling structure and sub-wavelength slots the isolation between the radiators is significantly improved (>34.8 dB). Moreover, there is an improvement in the array’s fractional bandwidth, gain and the radiation efficiency. The optimized array design for operation over 5.0-6.6 GHz has an average gain and efficiency of 10 dBi and 83%, respectively. Results show that the array’s performance is not greatly affected by a certain amount of bending. In fact, the antenna maintains a gain between 8.65-10.5 dBi and the efficiency between 77-83%. The proposed MIMO antenna array is relatively compact, can be easily fabricated on one side of a dielectric material, allows easy integration with RF circuitry, is robust, and maintains its characteristics with some bending. These features make it suitable for various wearable applications and biomedical telemetry devices

Metasurface-inspired flexible wearable MIMO antenna array for wireless body area network applications and biomedical telemetry devices

This article presents a sub-6GHz ISM-band flexible wearable MIMO antenna array for wireless body area networks (WBANs) and biomedical telemetry devices. The array is based on metasurface inspired technology. The antenna array consists of 2 x 2 matrix of triangular-shaped radiation elements that were realized on 0.8 mm thick Rogers RT/duroid 5880 substrate. Radiation characteristics of the array are enhanced by isolating the surface current interaction between the individual radiators in the array. This is achieved by inserting an electromagnetic bandgap (EBG) decoupling structure between the radiating elements. The radiating elements were transformed into a metasurface by etching sub-wavelength slots inside them. The periodic arrangement of slots acts like resonant scatterers that manipulate the electromagnetic response of the surface. Results confirm that by employing the decoupling structure and sub-wavelength slots the isolation between the radiators is significantly improved (>34.8 dB). Moreover, there is an improvement in the array's fractional bandwidth, gain and the radiation efficiency. The optimized array design for operation over 5.0-6.6 GHz has an average gain and efficiency of 10 dBi and 83%, respectively. Results show that the array's performance is not greatly affected by a certain amount of bending. In fact, the antenna maintains a gain between 8.65-10.5 dBi and the efficiency between 77-83%. The proposed MIMO antenna array is relatively compact, can be easily fabricated on one side of a dielectric material, allows easy integration with RF circuitry, is robust, and maintains its characteristics with some bending. These features make it suitable for various wearable applications and biomedical telemetry devices

Case study of an HEVC decoder application using high-level synthesis: intraprediction, dequantization, and inverse transform blocks

International audienc

A New Adaptive Filter to Remove Impulsive Noise in Color Images

International audienceIn this paper, a new adaptive vector directional distance filter (AVDDF) is proposed. The AVDDF filter is developed to remove the ‘salt and papper’ impulsive noise in color images. This algorithm consists in first step to detect pixels that are likely to have been contaminated with noise by using a threshold value. In second step, after recognizing the corrupted pixels, the smallest angular-magnitude distance is used to replace the noisy pixels. The proposed filter is tested with several standard color images which are contaminated with various levels of ‘salt and pepper’ impulsive noise (3%, 5%, 10%, 20% and 30%). The performance of the proposed filter is measured with peak signal-to-noise ratio (PSNR) and normalized color difference (NCD). The simulation results show that the proposed filter permits to ameliorate the performance of the classic vector directional distance filter (VDDF). Indeed, it provides an improvement by an average of 5% and 26% in the PSNR and NCD relative to the VDDF filter, respectively, with a small increase in the execution time by 6%. Besides, the AVDDF filter allows also an enhancement by an average of 2% and 14% in the PSNR and NCD relative to adaptive vector median filter (AVMF), respectively

An efficient FPGA-based design for the AVMF filter

This paper introduces an efficient parallel hardware architecture to implement the Adaptive Vector Median Filter (AVMF) in Field Programmable Gate Array (FPGA). This architecture is developed using the VHSIC Hardware Description language (VHDL) language and integrated in the Hardware/Software (HW/SW) environment as coprocessor. The NIOS II softcore processor is used to execute the SW part. The communication between HW and SW parts is carried out through the Avalon bus. The experimental results on the Stratix II development board show that the HW/SW AVMF system allows a reduction in processing time by 572 times relative to the SW solution at 140MHz with small decrease in image quality

An FPGA Design for Real-Time Image Denoising

International audienceThe increasing use of images in miscellaneous applications such as medical image analysis and visual quality inspection has led to growing interest in image processing. However, images are often contaminated with noise which may corrupt any of the following image processing steps. Therefore, noise filtering is often a necessary preprocessing step for the most image processing applications. Thus, in this paper an optimized field-programmable gate array (FPGA) design is proposed to implement the adaptive vector directional distance filter (AVDDF) in hardware/software (HW/SW) codesign context for removing noise from the images in real-time. For that, the high-level synthesis (HLS) flow is used through the Xilinx Vivado HLS tool to reduce the design complexity of the HW part. The SW part is developed based on C/C++ programming language and executed on an advanced reduced instruction set computer (RISC) machines (ARM) Cortex-A53 processor. The communication between the SW and HW parts is achieved using the advanced extensible Interface stream (AXI-stream) interface to increase the data bandwidth. The experiment results on the Xilinx ZCU102 FPGA board show an improvement in processing time of the AVDDF filter by 98% for the HW/SW implementation relative to the SW implementation. This result is given for the same quality of image between the HW/SW and SW implementations in terms of the normalized color difference (NCD) and the peak signal to noise ratio (PSNR)